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E106-470G27P2 LoRa chip SX1302 PA LNA LoRa LoRaWAN gateway module RF with mini PCI-e interface

[Introduction]：E106-470G27P2 module is a LoRa gateway RF module designed based on the SX1302 chip. It adopts the standard Mini PCI-e package, SPI interface, the module has built-in PA and LNA, and the half-duplex design is convenient for users to quickly develop LoRa gateway equipment.

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No.	Mini PCIe pin	E106-xxxG27P2 pin	I/O	Function	Notes
1	WAKEM	RESERVED	DO	Used by transparent transmission version, floating
2	3.3Vaux	VCC_3V3	PI	3.3V DC main power input
3	COEX1	NC	——	For internal use, keep floating
4	GND	GND	——	Ground
5	COEX2	NC	——	For internal use, keep floating
6	1.5V	NC	——	Unused
7	CLKREQ#	NC	——	For internal use, keep floating
8	UIM_PWR	NC	——	Unused
9	GND	GND	——	Ground
10	UIM_DATA	RESERVED	IO	Used by transparent transmission version, floating
11	REFCLK-	RESERVED	DI	Used by transparent transmission version, floating
12	UIM_CLK	RESERVED	IO	Used by transparent transmission version, floating
13	REFCLK+	RESERVED	DO	Used by transparent transmission version, floating
14	UIM_RESET	NC	——	Unused
15	GND	GND	——	Ground
16	UIM_VPP	NC	——	For internal use, keep floating
17	RESERVED	NC	——	For internal use, keep floating
18	GND	GND	——	Ground
19	RESERVED	PPS	DI	GPS timing input	Can be floated
20	W_DISABLE#	NC	——	For internal use, keep floating
21	GND	GND	——	Ground
22	PERST#	NRESET	DI	Reset control pin	High level reset
23	PERn0	RESERVED	DI	Reserved： external floating
24	3.3 Vaux	VCC_3V3	PI	33V DC main power input
25	PERp0	NC	——	Unused
26	GND	GND	——	Ground
27	GND	GND	——	Ground
28	L5V	NC	——	Unused
29	GND	GND	——	Ground
30	SNIB_CLK	NC	——	For internal use, keep floating
31	PETn0	RESERVED	DO	Reserved： external floating
32	SMB—DATA	NC	——	For internal use, keep floating
33	PETp0	NC	——	Unused
34	GND	GND	——	Ground
35	GND	GND	——	Ground
36	USB_D+	RESERVED	IO	Used by transparent transmission version, floating
37	GND	GND	——	Ground
38	USB_D+	RESERVED	IO	Used by transparent transmission version, floating
39	3 3 Vaux	VCC_3V3	PI	3.3V DC main power input
40	GND	GND	——	Ground
41	3.3 Vaux	VCC_3V3	PI	3.3V DC main power input
42	LED_WWAN#	RX_ON	DO	connected to the GPIO3 of SX1302.
43	GND	GND	——	Ground
44	LED—WLAN#	TX_ON	DO	connected to the GPIO3 of SX1302.
45	RESERVED	SX_SCK	DI	SPI clock signal input
46	LED—WPAN#	CFG_ON	DO	CFG indication, connected to onboard LED
47	RESERVED	SX_NflSO	DO	SPI data output
48	L5V	NC	——	Unused
49	RESERVED	SX_MOSI	DI	SPI data input
50	GND	GND	——	Ground
51	RESERVED	SX_CSN	DI	SPI chip select signal input
52	3.3Vaux	VCC_3V3	PI	3.3V DC main power input